The present invention relates to a tuning demodulator for digitally modulated RF signals for detecting RF signals digitally modulated by television signals or the like.
A conventional tuning demodulator for digitally modulated RF signals for receiving and detecting RF signal digitally modulated by television signal or the like, for example, RF signal in 1-2 GHz band is as shown in FIG. 11, in which the RF signal entered from an RF signal input terminal 301 through a receiving antenna is amplified in an RF circuit 302, and enters a mixing circuit 303, and is mixed with an output signal of a local oscillation circuit 304 of which output frequency is in a same RF band as the RF signal, for changing the output frequency while keeping a specific frequency difference from the frequency of a desired receiving channel, and the station is selected by converting the frequency of the desired receiving channel to an IF signal, for example, a signal in 400 MHz band. Moreover, this IF signal is amplified in an IF circuit 306 (IF amplification), and passed through a band pass filter (IF BPF), and then it is put into an I/Q detection circuit 306 together with an output signal of a detection oscillator 307 of which output frequency is in IF band, and undergoes orthogonal demodulation (or quadrature demodulation) to be taken out from output terminals 308a, and 308b as so-called I signal and Q signal. (In this specification, I and Q signals are not color difference signals as defined in the NTSC system, but are modulation signals which modulate carriers differing in phase by 90xc2x0.) In this conventional apparatus, since the RF is once converted into an IF signal (hereinafter called down-converting method), if the oscillation signal of the local oscillation circuit 304 leaks from the RF input terminal 901, its frequency is apart from the RF signal by the portion of the IF frequency, and it has no interference on other receiving apparatus having the same receiving frequency band, but as known from FIG. 11, the mixing circuit and oscillation circuit are required by two pieces each, such as 303, 306, and 304, 307, and the tuning demodulator for digitally modulated RF signals itself is complicated, and there are problems in design and manufacture. It was accordingly proposed to simplify and downsize the apparatus by selecting the station and detecting simultaneously (hereinafter called direct detection method) by using an oscillation circuit for detection, without employing the down-converting method, of which output frequency is nearly same as the frequency of the desired receiving channel in the RF signal, but in this method, the problem was that the oscillation signal of the oscillation circuit for detection leaks from the RF input terminal to impede other receiving apparatus having the same receiving frequency band, and any prior art overcoming this problem was not known yet.
Incidentally, the output signal in the local oscillation circuit of down-converting method or oscillation circuit for detection in direct detection method in the case of receiving 12 GHz band satellite broadcast by using a consumer receiving system is generated accurately and stably by a PLL frequency synthesizer on the basis of the nominal frequency of broadcast, but in the 12 GHz band receiving antenna, since the frequency is not converted accurately and stably into 1-2 GHz band as in the PLL frequency synthesizer, the frequency of the RF input signal is slightly deviated usually from the nominal frequency to cause a frequency error. FIG. 12 shows a tuning demodulator far digitally modulated RF signals having a function of compensating for the frequency error by the direct detection method, which corresponds to the QPSK modulated RF signals. In this conventional apparatus, the output frequency (that is, the frequency of output signal) of an oscillation circuit for detection 404 is set by a PLL frequency synthesizer 404a so as to coincide with the nominal frequency of the input signal to be selected on the basis of the output frequency of a reference oscillator 408, but actually it remains fixed even if the RF signal has a frequency error, and there was a possibility of deterioration of bit error rate in a later stage. The output of the detection circuit 404 is put into A/D converters 409a and 409b through low pass filters 408a and 400b, and is converted into a digital signal by using a clock signal regenerated in a clock regenerating circuit 412. Afterwards, in a first complex multiplier 411, the frequency error is compensated by using the output signal of a frequency error detection circuit 414, and therefore deterioration of bit error rate is prevented. Further later, in order to avoid interference between signals, a clock signal and a carrier signal are regenerated in a second complex multiplier 416, together with the clock regeneration circuit 412 and carrier regeneration circuit 413, through roll-off filters 410a and 410b, while data is detected from its output signal in a data detection circuit 417, and clock signal and data signal are issued from output terminals 418a and 418b, respectively. Incidentally, all circuits enclosed by broken line 420 in FIG. 12 are integrated into an one-chip LSI. Such conventional apparatus, however, requires a circuit to compensate for frequency error, such as the complex multiplier 411, and the apparatus itself is complicated to cause problems in design and manufacture, and moreover in order to compensate for the frequency error by the complex multiplier 411 only, its operation bit number must be sufficiently large, which causes to deteriorate the bit error rate.
Thus, the conventional tuning demodulators for digitally modulated RF signals, whether in down-converting method or in direct detection method, were complicated in apparatus, increased in size, and raised in coat, and had problems in performance such as leek of interference radio wave and deterioration of bit error rate. The tuning demodulator for digitally modulated RF signals of the invention is not only simplified in apparatus, reduced in size, and lowered in cost, but also presents various benefits to contribute to reduction of leak of interference radio wave, improvement of bit error rate, and enhancement of station selection performance.
To solve the above problems, it is a first object of the invention to present a tuning demodulator for digitally modulated RF signals simplified in apparatus, reduced in size, and lowered in cost, by facilitating the means for suppressing leakage of oscillation signal of the oscillation circuit for detection from the RF input terminal, in the tuning demodulator for digitally modulated RF signals by direct detection method for selecting and detecting digitally modulated RF signals simultaneously, and it is a second object to present a tuning demodulator for digitally modulated RF signals simplified in apparatus, reduced in size, and lowered in cost, as well as improved in the bit error rate and enhanced in the station selecting performance, without requiring the hitherto needed complex multiplier for compensation of frequency error.
To achieve the first object, the invention is characterized by generating an unmodulated wave having a frequency nearly equal to the frequency of desired reception signal among RF signals digitally modulated to be put in an RF input signal, in an oscillation circuit for detection, selecting a station and detecting simultaneously by entering this output signal and the RF signal amplified through the input terminal and RF circuit into an I/Q detection circuit, issuing detected I and Q original signals, and suppressing leak of the oscillation signal of the oscillation circuit into the input terminal by radiation into path other than the intended signal path, that is, into the space, by disposing physical and/or electrical signal separating means between the RF circuit and the oscillation circuit (hereinafter, in the invention, xe2x80x9cphysicalxe2x80x9d refers to a visible position in a circuit in spatial, planar or linear term, as being distinguished from xe2x80x9celectricalxe2x80x9d).
In one aspect of the invention, the I/Q detection circuit in the signal separating means, and by disposing physically the RF circuit and input terminal on one side and the oscillation circuit on other side of the I/Q detection circuit so as to separate the both circuits physically, the strength of the electric field for the oscillation signal of the oscillation circuit invading into the RF circuit by radiating into the space is reduced, so that leak of the oscillation output signal into the input terminal is suppressed. Moreover, by forming a flat section of a metallic casing for accommodating these circuits in a nearly square form, the RF circuit, I/Q detection circuit, and oscillation circuit are physically disposed closely to one side thereof in this sequence, and therefore the side of the casing acts as a grounding surface close to each circuit, the output impedance of the oscillation circuit is prevented from being higher parasitically, radiation of the output signal of the oscillation circuit into the space is suppressed, and the leak from the input terminal through the RF circuit can be prevented. Further, since the leak of the output signal of the oscillation circuit can occur also through an direct-current power source supplied in each circuit, and by disposing at least the power source terminal of the RF circuit and the power source terminal of the oscillation circuit separately, it is possible to prevent the problem of leak .of the signal of the oscillation circuit from the input terminal by invading into the RF circuit through the lead wire for supplying the direct-current power source.
In other aspect of the invention, in the casing, by disposing a metal partition board physically between the RF circuit and the oscillation circuit, the apace between the two circuits can be cut oft and invasion of the oscillation signal of the oscillation circuit into the RF circuit by radiating into the space can be prevented, and the leak of the oscillation signal of the oscillation circuit from the input terminal through the RF circuit can be suppressed.
In a different aspect of the invention, a print pattern of the RF circuit is formed on one side of a multilayer printed circuit board having a ground plane in the intermediate layer, and a print pattern of the oscillation circuit is formed on other side, and the ground plane is shared, and therefore if the oscillation signal of the oscillation circuit radiateand into the apace, the ground plane acts as an electric shielding board to prevent invasion into the RF circuit, so that leak into the input terminal can be suppressed.
In a further aspect of the invention, the plane region of the single-layer printed circuit board is divided into two, and the RF circuit is provided on the surface of one region, and the oscillation circuit is provided on the back side of other region, and a plurality of through-holes are provided for electrically shorting between the grounding surface of the print patterns of the RF circuit and oscillation circuit, and therefore if the grounding surfaces are electrically separated, it is possible to prevent the trouble of the output impedance of the oscillation circuit becoming parasitically high and radiating into the space, that is, the electric (high frequency) separation of the two circuits is increased, and leak of the oscillation signal of the oscillation circuit from the input terminal can be suppressed.
In a further different aspect of the invention, by disposing a low pane filter for suppressing the oscillation output signal of the oscillation circuit between the oscillation circuit and the terminal for feeding direct-current power source thereto, leak of the signal of the oscillation signal from the input terminal through the RF circuit can be suppressed.
To achieve the second object of the invention, I and Q original signals obtained by input of an RF signal having a frequency error to be entered in an RF input terminal as in the case of receiving 12 GHz band satellite broadcast into an I/Q detection circuit together with the output signal of an oscillation circuit for detection composed of a PLL frequency synthesizer having a voltage control crystal oscillator (VCXO) as reference oscillation signal source are processed by low pass filter. A/D converter, roll-off filter and complex multiplier, a digital output signal value corresponding to the magnitude of the frequency error is generated by a frequency error detection circuit, and an output signal obtained by passing through a D/A converter is used as control voltage of the reference oscillation signal source to control the output frequency in the direction of compensating for the frequency error, so that the frequency error is compensated by establishing the synchronism of a phase lock loop in the PLL frequency synthesizer. In the invention, since the output frequency of the reference oscillator is controlled by the output signal of the frequency error detection circuit, the frequency error is compensated in the I/Q detection circuit, and therefore a favorable bit error rate is obtained, and the conventional complex multiplier with a large number of operation bits to compensate for the frequency error is not needed, so that the apparatus may be simplified in structure, reduced in size, and lowered in cost. Moreover, the demodulated digital signal obtained from the data detection circuit consecutive to the complex multiplier is taken outside from two output terminals, and clock signal and carrier signal necessary for the above signal processing are extracted and regenerated from the I and Q signals obtained in the I/Q detection circuit by the clock regeneration circuit and carrier regeneration circuit together with the complex multiplier.
In one aspect of the invention, the reference oscillation signal is generated from the clock signal regenerated in the clock regeneration circuit and the output signal of the error detection circuit, and a favorable bit error rate is obtained in a simple constitution, not particularly requiring reference oscillator.
In other aspect of the invention, if the frequency error of the frequency of the input signal into the input terminal is larger than a predetermined value f and the synchronism of the apparatus is not established, the output signal value of the frequency error detection circuit is sequentially changed and issued until the synchronism is established at the interval xcex94v corresponding to the value xcex94f and the control voltage of the reference signal oscillator is changed sequentially, that is the operation for searching the output frequency of the oscillation circuit for detection completely is repeated until the synchronism is established, so that accurate station selection is achieved. Besides, since the relation between the output frequency of the oscillation circuit for detection and the control voltage of the reference oscillator differs depending on the frequency of the input signal, if the frequency range of the input signal differs in a wide range, by designing to change and issue the output signal value preliminarily according to the station selection frequency, the station selection is enhanced in speed. Moreover, if the frequency error of the input signal is over the output frequency variable range of the oscillation circuit for detection corresponding to the frequency variable range of the reference oscillation signal, by changing the output signal value and changing the counter values of the PLL synthesizer, the output frequency of the oscillation circuit for detection can be changed, so as to be applicable to a larger frequency error of the input signal.
In a different aspect of the invention, a frequency error correction circuit having a function of reading the frequency of the reference oscillation circuit and generating an output signal for correcting it may be also provided, and it is possible to cope with if the frequency to control voltage characteristic of the reference oscillator is out of the standard deviation, and therefore the precision of the reference oscillator is not required to be too high. Besides, the output signal value of the error detection circuit can be also corrected by using the output signal of the error correction circuit, an accurate frequency error correction is realized. Still more, by using the output signal of the error correction circuit, the output frequency of the oscillation circuit for detection can be changed by varying the counter values of the PLL frequency synthesizer, so that a large frequency error can be also corrected.
The invention processes RF input signal digitally modulated in the above constitution by physical and/or electrical signal separating means disposed between an RF circuit and an oscillation circuit for detection, in a direct detection method not depending on down-converting method, and therefore prevents impedance on the other receiving apparatus by suppressing leak of oscillation signal of the oscillation circuit from the RF input terminal. Moreover, it also comprises means for obtaining the frequency error of the RF input signal as output signal value of frequency error detection circuit, and controlling the output frequency of the oscillation circuit for detection by it to compensate for the frequency error, and therefore the conventional complex multiplier for frequency error compensation is not needed, and since this complex multiplier was a cause of deterioration of bit error rate, the bit error rate can be improved, and various station selecting performances are enhanced. In addition, anyway, the apparatus is simplified, reduced in size and lowered in cost.